Efforts to manufacture cheaper, faster and smaller cell phones, digital cameras and other electronics have been hampered by the performance of materials in today’s semiconductor devices. Industry is in search of improved insulating materials for use between the metal lines on silicon chips that minimize capacitance - charge buildup - as the metal lines are brought closer together. Lower capacitance can result in higher signal speed and lower power consumption.

Now, researchers at Pacific Northwest have developed a porous, silica thin film with a nearly 50 percent reduction in capacitance over high-density silica, the industry standard. Researchers are teamed with Sematech, a major semiconductor consortium, to develop, test and evaluate the technology.

Article courtesly of "PNNL TechNotes"

Contact: Marv Clement at (509) 375-2789

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